Intel And HP Unveil Merced Architecture

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May 26, 1999 (12:00 AM EDT)

By Marcia Savage ,

Aiming to speed development of software applications for Merced, Intel and Hewlett-Packard Tuesday disclosed details of the IA-64 chip architecture.

Intel, based in Santa Clara, Calif., and Hewlett-Packard, in Palo Alto, Calif., collaborated on the IA-64 architecture, which is the basis for Intel's Merced processor and other future 64-bit chips for high-end servers and workstations.

Details of the application instruction set, architecture features, and the programming model for IA-64 processors were scheduled to be available Wednesday on Intel's and Hewlett-Packard's websites.

"A lot of the key companies have already seen this [IA-64 instructions] -- the core companies [with] the operating systems and the big applications have already started the move to Merced," said Martin Reynolds, vice president of technology assessment at Dataquest, in San Jose, Calif. "What this does is open it up to everybody. Every application can now start thinking Merced."

IA-64 is the "most significant" microprocessor architecture development since the 1985 Intel 386, which extended the Intel architecture from 16-bit to 32-bit, said Ron Curry, director of marketing for the IA-64 processor division at Intel.

Merced extends the Intel architecture from 32-bit to 64-bit and is the first application of Explicitly Parallel Instruction Computing (EPIC) technology. The chip is scheduled for production in mid-2000. Curry declined to say when Merced will roll out, but said Intel expects to have "the first silicon in a few months."

Curry said the goal of the IA-64 architecture was to improve on today's RISC and 32-bit architectures. He said IA-64 is designed to meet the large memory requirements and performance requirements of future data warehousing, e-business, Internet, and other high-end applications.

The architecture is highly scalable and offers a "flexible and rich instruction set" to address future computing needs, Curry said.

IA-64 offers full binary compatibility with Intel's IA-32 as well as Hewlett-Packard's PA-RISC processors, he said.

Jim Carlson, director of worldwide IA-64 systems marketing at Hewlett-Packard, saidIA-64 enhances multimedia performance and offers end users more secure transactions. The architecture also aims to beef up performance for object-oriented languages, he said.

"There are a lot of little things going on in the architecture that will make a big difference" in high-performance applications, he said.

An advanced, new floating-point architecture improves performance for technical applications, he added. IA-64 pre-fetches data from memory for fast access and manages caches for maximum efficiency, Carlson said.

Dataquest's Reynolds said IA-64 narrows the gap between processor and memory performances, a gap that has been growing for several years as processor performance leaped past memory performance.

"That's quite an advance in itself and it's a tremendous move for the industry," he said.

"It's an enormous amount of work to take all the software that exists and move it to this new architecture, but when its done, there will be a significant benefit in performance as we go forward," he said.

Although it's not clear what Merced's performance level will be, Reynolds said it is likely to prove a great performer in some applications.