Intel's CEO Promises Intense Year

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September 15, 1998 (3:10 PM EDT)

By Mark Hachman,

Speaking Tuesday at the opening morning of the Intel Developers' Forum, Intel president and CEO Craig Barrett said 1999 would become the most intense year of new processor introductions in the company's history, despite what some analysts are calling an industry downturn.

While some companies may hesitate and let their competitors get ahead in a down cycle, Intel (company profile) intends to aggressively pursue processor and other technology introductions in the coming year. "I guess the message I'd like to get out is don't let the cycle, the economic cycle, get you down," said Albert Yu, senior vice-president of Intel's Microprocessor Products Group.

Barrett and Yu conceptually addressed new processor and technology introductions past the turn of the century. Merced, Intel's forthcoming 64-bit chip, is still on track to enter production by mid-2000, while its successor, McKinley, is now slated for production in the second half of 2001, according to Intel.

Meanwhile, Intel's existing 32-bit processor road map will also move forward, with new devices scheduled for introduction up through McKinley's launch and beyond. And in a sign of what's to come on the desktop PC, the company demonstrated a Pentium II running at approximately 800 MHz.

Confirming earlier reports, executives also said Intel's 0.18-micron microprocessors -- named Coppermine and Cascades -- would integrate an undisclosed amount of Level 2 cache directly onto the die.

Barrett used his talk as a platform to convince developers the copper interconnect and silicon-on-insulator processes used by Motorola, IBM, and other semiconductor makers are not the way to increasing performance within a microprocessor. Instead, Barrett said Intel will concentrate first upon increasing the speed of the transistors within the chip, moving to the faster copper-interconnect process only in its 0.13-micron generation.

Analysts disputed Intel's strategy, however, saying the effects upon a processor's performance are about equally split between the performance of the transistors and the interconnects. Peter Glaskowsky, a multimedia analyst with MicroDesign Resources in Sunnyvale, Calif., drew an analogy between the flow of data upon a chip and the flow of traffic in a network of connected streets. "If you eliminate the traffic lights, my commute will be faster," he said. "But if you raise the speed limit, my commute gets shorter as well."

The opening day of the IDF also sought to prepare developers for the imminent launch of Katmai, the forthcoming 450-MHz and 500-MHz 32-bit chips that Intel has promised original equipment manufacturers (OEMs) it will ship in the first quarter of 1999. While reiterating the technical aspects of the Katmai's new instructions, such as the application of single instructions to multiple, floating-point instructions, Intel said early tests revealed a 10 percent improvement over MMX for multimedia-specific instructions. At peak bandwidth, the Katmai's new instructions should offer 2 gigaflop floating-point calculations, Yu said.

In his presentation, Barrett also stressed the need for easy-to-use PCs that are more secure and have more available bandwidth. On that front, Barrett said, forthcoming Intel products such as the company's chip sets, which will have both manageability and security features built into them. "The [Intel] road map will become more complex, requiring us to work together," Barrett said. "We have to transcend the marketplace."

To let OEMs access the increasingly diverse array of support documents, specifications, and other printed materials, Intel has formed the Intel University Press, a publishing unit devoted to dispensing literature authored by Intel and the industry.