Xeon Power Lessens Effect Of Merced Delay

Welcome Guest. | Log In| Register | Membership Benefits

June 08, 1998 (1:47 PM EDT)

By Tom Davey With Mary Hayes,

Customers weary of the demands of constant server upgrades said they are not disturbed by the delay of Merced, Intel's highly touted 64-bit chip. With the launch of its Xeon processor on June 29, Intel may be offering quite enough power to satisfy many users' existing and near-term needs.

Next week at PC Expo, vendors will demonstrate their first Xeon systems and provide preferred customers with technical and benchmarking data. Among the companies to join as participants in the Xeon rollout are Hitachi and Toshiba, which will introduce their first servers for U.S. buyers at the show.

But as was the case with Intel's introduction of the Pentium Pro in late 1995, many system vendors will not be allocated large quantities of Xeon chips until months after Intel makes its announcement. While vendors will have some four-processor Xeon systems available to customers at launch, several say they will not have volume shipments of four-way 400-MHz Xeon servers and workstations ready until fall, and their 450-MHz Xeon units will likely be pushed back to January. Xeon is also expected to be available from some vendors in eight-processor configurations during the fourth quarter.

Xeon's performance boost will vary greatly among applications, but system vendors -- including Sequent -- said internal benchmarks show Xeon can nearly double the Pentium Pro's performance on some database, data warehousing, and Internet applications. Database applications with a "bigger cache footprint," should do best, said Justin Rattner, Intel's director of server architecture labs. "Oracle has a larger footprint, and we've seen very close to double the performance [of the Pro]." Rattner said, however, "Microsoft's Sequel Server has a smaller cache footprint."

Contributing to Xeon's performance is its support for up to 8 gigabytes of memory. The 450-MHz version will also have 2 megabytes of Level 2 cache; this high-speed memory, which sits close to the processor, is seen as critical for top performance in multiprocessing computing.

Other performance-boosting enhancements include a 64-bit peripheral component interconnect bus and fibre channel for improved access to disk drives. Jim Carlson, Hewlett-Packard's marketing manager for IA-64 systems, says HP is also working in other ways to scale up the 32-bit architecture for better performance.