Intel's Merced May Be Delayed

April 17, 1998 (3:10 PM EDT)

By Mo Krochmal,

Intel may have to put off the introduction of its next-generation, 64-bit chip, code-named Merced, said Zona Research.

Also known as the P7, Merced uses a new instruction architecture called IA-64. It is expected to run x86 and PA-RISC software natively with clock speeds at 600 MHz and beyond. The Merced chip, which Intel is building in collaboration with Hewlett-Packard, is the next-generation computer chip for the high-end workstation and server market.

"In looking at slowing sales and profits, there is a glut of computer power on desktops in enterprises and home," said Harry Fenik, vice president of Zona Research, a market research firm based in Redwood City, Calif. "The irony is that Intel's ability to deliver on Moore's law may force them to delay the more powerful chips."

Intel spokesman Marion Koehler Friday said the only announcement the company has made is that the chip will go into production in the second half of 1999.

The chip uses Explicitly Parallel Instruction Computing technology to allow software to communicate with the processor to ease parallel operations. The chip processors are to be backward-compatible with 32-bit processor machines.

Intel will have to wait for the market to absorb the existing computer cycles before it releases the chip, Fenik said.