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MEARS Technologies Joins Forces with Elpida Memory to Improve Chip Performance
Mar 17, 2008 (08:03 AM EDT)


WALTHAM, Mass., March 17 /PRNewswire/ -- MEARS Technologies, Inc., a provider of advanced silicon processes and engineering services to semiconductor device manufacturers and contract foundries, today announced that it has signed a commercial agreement with Elpida Memory, Inc. (Elpida), Japan's leading global supplier of Dynamic Random Access Memory (DRAM). The two companies will work together using MEARS Silicon Technology (MST for CMOS) to create more efficient chip performance.

Elpida is renowned for creating one of the world's most efficient memory ICs for computing, communications and consumer electronics applications. By enhancing the physical properties of silicon through a breakthrough in materials engineering, MEARS has demonstrated that MEARS Technologies' MST for CMOS will improve overall chip performance and reduce static power without introducing any new materials into existing manufacturing process flows.

"Partnering with MEARS gives us access to a company deeply experienced in materials technology for device scaling," said Elpida's Chief Technology Officer, Takao Adachi. "This will help boost Elpida's memory products to a much higher technology level, especially in terms of power consumption."

"We are delighted to be working with one of the world's premier memory companies," said MEARS Technologies' Founder and President, Dr. Robert Mears. "We are confident that our technology will help Elpida to increase market share with differentiated products -- without the need for sweeping changes in materials or huge investments in new equipment and facilities."

About MEARS Technologies' MST for CMOS

Using a breakthrough silicon engineering technique, MEARS Technologies has developed its patented MST for CMOS technology to provide a simultaneous increase in transistor performance with dramatically reduced static power, providing a significant advantage for all applications that benefit from reduced power consumption or the need to optimize performance per Watt. The technology is designed to be fully compatible with semiconductor manufacturers' baseline processes, whether bulk CMOS, strained silicon, silicon-on-insulator or high-k / metal gate. The improvements are achieved through a (sub-) band engineering approach that is based on a deep understanding of the quantum mechanics of modern deep-submicron devices. In its first implementation, MST for CMOS is a precision nano-doped silicon layer that is integrated into a standard CMOS flow. The channel replacement layer can be added without introducing new materials in the fabrication process. This "silicon-on-silicon" solution adds only a few steps to the standard CMOS manufacturing flow -- at virtually no additional manufacturing cost or yield impact.

About MEARS Technologies

MEARS Technologies is an emerging materials technology company providing advanced silicon processes and engineering services to semiconductor device manufacturers and contract foundries. The company combines a core competency in materials engineering and quantum mechanics with deep semiconductor process technology know-how to optimize the power efficiency and performance of integrated circuits manufactured on deep sub-micron processes. With a licensing model and strong patent position covering breakthrough silicon structures, methods and processes, MEARS Technologies enhances the fundamental electronic properties of silicon without requiring new manufacturing equipment or the use of exotic materials. For more information about MEARS Technologies, please visit http://www.mearstechnologies.com .

CONTACT: Bridgid Bartkiewicz of MEARS Technologies, +1-617-219-0611, bridgid.bartkiewicz@mearstechnologies.com; or Jessie Hennion of PorterNovelli for MEARS Technologies, Inc., +1-617-897-8230,

Web site: http://www.mearstechnologies.com/